An adder is one of the arithmetic logic units used in a computer. The adder performs multi-bit addition operation for e.g. integer and fixed-point or floating-point values. Furthermore, the adder also serves as a component of other arithmetic logic units, such as a subtractor and multiplier. Thus, the adder is required to have versatility and high speed performance.
In a multi-bit adder, the propagation time of a carry signal from a less significant position to a more significant position limits the overall processing speed of the adder. Thus, circuit techniques such as the carry look-ahead scheme for performing carry operation for a more significant position in advance have been used to enhance the speed. On the other hand, from the viewpoint of increasing the operating speed of the logic element itself, miniaturizing the CMOS device have been used to enhance its operating speed.
However, the circuit size is increased in the CMOS circuit equipped with the carry look-ahead scheme. Furthermore, the physical limit in the miniaturization technology is also coming into sight as an inevitable reality. Moreover, with the increase in circuit size and the miniaturization, the increase in dynamic power consumption due to parasitic capacitance and the increase in static power consumption due to leakage current are emerging as major problems. Thus, there is a strong demand for a technique for limiting the power consumption to within a desired range to enhance the speed of computation processing.
One of the potential approaches aiming to break the limits of existing techniques is the so-called “Beyond CMOS” technology, which is not necessarily based on the Boolean algebra and CMOS architecture. This technology includes approaches for information processing without charge movement, such as optics, magnetic spin, and biotechnology. In particular, the spin wave is a space-time fluctuation of a magnetic moment in a magnetic body. The spin wave can be generated by low energy in principle, and is a high-speed oscillation phenomenon above GHz. Thus, a spin wave-based logic element is a promising candidate for future practical application as a power-saving information processing device. Examples of the spin wave-based logic element are disclosed in United States Patent Application Publication No. 2007/0296516 and Applied Physics Letters 87, 153501 (2005). However, the method for configuring an adder with suppressed increase in circuit size has not been known.